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Silicon Nanowires
for Nanoelectronics and Thermoelectric Applications |
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| Low
cost and simple methodology for fabrication of Si nanowires
lends itself to simple device design and testing, as
the nanowires are laterally etched into silicon, or
SOI wafers providing needed isolation for experiments.
Process requires only standard, e.g. 1 µm, lithography. |
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| Si
nanowires on SOI wafer in ARI process, after only the
initial etch. |
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| SEMs
of lateral nanowire sets after first oxidation. Wires
are between 2 pads for testing. Further oxidation thinsdiameters
as desired. |
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We are exploring possible
thermoelectric, biomedical, electronic, and light-emitting
applications. Diameters are chosen by subsequent oxidation
thinning. Wires with n-type or p-type or junctions are
fabricated. |
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| Coaxial
nanowires with poly shield have also been fabricated.
Poly shield is selectively etched. Bottom right – removed
poly shield beads in a nanoscale calculator – Nano-Abacus |
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| V.
Milanovic, L. Doherty, “A simple process for lateral single crystal
silicon nanowires,” accepted for presentation at IMECE 2002, New
Orleans, LA. |
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| V.
Milanovic, L. Doherty, D. Teasdale, S. Parsa, C. Zhang, and K.
Pister, ``Micromachining Technology for Lateral Field Emission
Devices,'' IEEE Tran. Electron Devices, vol. 48, no. 1, pp. 166-173,
Jan. 2001. |
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